The present invention relates to a semiconductor memory device and, more particularly, to technology which is effective if applied to the testing function of a RAM (i.e., Random Access Memory) intended to have its memory capacity increased, for example.
As semiconductor technology develops, dynamic RAMs have been developed which have a capacity as large as about 16 Mbits. In order that the testing time of such dynamic RAMs may be prevented from increasing in accordance with such enlarged memory capacity, a test mode function is given to shorten the testing time so that a plurality of consecutive pairs of complementary data lines may be selected by a column select switch. This type of dynamic RAM having the test mode function is exemplified on pp. 67 to 81 of "Nikkei Micro Device" issued on Mar. 1, 1988 by Nikkei McGRAW-HILL.
A dynamic RAM which has a memory cell array of data line twist type for reducing noises in operation from the adjoining data lines pairs is as disclosed in Japanese Patent Laid-Open No. 51096/1987.